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1 /*
2  * arch/arm/mach-at91/at91sam9261_devices.c
3  *
4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5  *  Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/fb.h>
21 #include <video/atmel_lcdc.h>
22
23 #include <asm/arch/board.h>
24 #include <asm/arch/gpio.h>
25 #include <asm/arch/at91sam9261.h>
26 #include <asm/arch/at91sam9261_matrix.h>
27 #include <asm/arch/at91sam926x_mc.h>
28
29 #include "generic.h"
30
31
32 /* --------------------------------------------------------------------
33  *  USB Host
34  * -------------------------------------------------------------------- */
35
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data;
39
40 static struct resource usbh_resources[] = {
41         [0] = {
42                 .start  = AT91SAM9261_UHP_BASE,
43                 .end    = AT91SAM9261_UHP_BASE + SZ_1M - 1,
44                 .flags  = IORESOURCE_MEM,
45         },
46         [1] = {
47                 .start  = AT91SAM9261_ID_UHP,
48                 .end    = AT91SAM9261_ID_UHP,
49                 .flags  = IORESOURCE_IRQ,
50         },
51 };
52
53 static struct platform_device at91sam9261_usbh_device = {
54         .name           = "at91_ohci",
55         .id             = -1,
56         .dev            = {
57                                 .dma_mask               = &ohci_dmamask,
58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
59                                 .platform_data          = &usbh_data,
60         },
61         .resource       = usbh_resources,
62         .num_resources  = ARRAY_SIZE(usbh_resources),
63 };
64
65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
66 {
67         if (!data)
68                 return;
69
70         usbh_data = *data;
71         platform_device_register(&at91sam9261_usbh_device);
72 }
73 #else
74 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
75 #endif
76
77
78 /* --------------------------------------------------------------------
79  *  USB Device (Gadget)
80  * -------------------------------------------------------------------- */
81
82 #ifdef CONFIG_USB_GADGET_AT91
83 static struct at91_udc_data udc_data;
84
85 static struct resource udc_resources[] = {
86         [0] = {
87                 .start  = AT91SAM9261_BASE_UDP,
88                 .end    = AT91SAM9261_BASE_UDP + SZ_16K - 1,
89                 .flags  = IORESOURCE_MEM,
90         },
91         [1] = {
92                 .start  = AT91SAM9261_ID_UDP,
93                 .end    = AT91SAM9261_ID_UDP,
94                 .flags  = IORESOURCE_IRQ,
95         },
96 };
97
98 static struct platform_device at91sam9261_udc_device = {
99         .name           = "at91_udc",
100         .id             = -1,
101         .dev            = {
102                                 .platform_data          = &udc_data,
103         },
104         .resource       = udc_resources,
105         .num_resources  = ARRAY_SIZE(udc_resources),
106 };
107
108 void __init at91_add_device_udc(struct at91_udc_data *data)
109 {
110         unsigned long x;
111
112         if (!data)
113                 return;
114
115         if (data->vbus_pin) {
116                 at91_set_gpio_input(data->vbus_pin, 0);
117                 at91_set_deglitch(data->vbus_pin, 1);
118         }
119
120         /* Pullup pin is handled internally */
121         x = at91_sys_read(AT91_MATRIX_USBPUCR);
122         at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
123
124         udc_data = *data;
125         platform_device_register(&at91sam9261_udc_device);
126 }
127 #else
128 void __init at91_add_device_udc(struct at91_udc_data *data) {}
129 #endif
130
131 /* --------------------------------------------------------------------
132  *  MMC / SD
133  * -------------------------------------------------------------------- */
134
135 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
136 static u64 mmc_dmamask = DMA_BIT_MASK(32);
137 static struct at91_mmc_data mmc_data;
138
139 static struct resource mmc_resources[] = {
140         [0] = {
141                 .start  = AT91SAM9261_BASE_MCI,
142                 .end    = AT91SAM9261_BASE_MCI + SZ_16K - 1,
143                 .flags  = IORESOURCE_MEM,
144         },
145         [1] = {
146                 .start  = AT91SAM9261_ID_MCI,
147                 .end    = AT91SAM9261_ID_MCI,
148                 .flags  = IORESOURCE_IRQ,
149         },
150 };
151
152 static struct platform_device at91sam9261_mmc_device = {
153         .name           = "at91_mci",
154         .id             = -1,
155         .dev            = {
156                                 .dma_mask               = &mmc_dmamask,
157                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
158                                 .platform_data          = &mmc_data,
159         },
160         .resource       = mmc_resources,
161         .num_resources  = ARRAY_SIZE(mmc_resources),
162 };
163
164 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
165 {
166         if (!data)
167                 return;
168
169         /* input/irq */
170         if (data->det_pin) {
171                 at91_set_gpio_input(data->det_pin, 1);
172                 at91_set_deglitch(data->det_pin, 1);
173         }
174         if (data->wp_pin)
175                 at91_set_gpio_input(data->wp_pin, 1);
176         if (data->vcc_pin)
177                 at91_set_gpio_output(data->vcc_pin, 0);
178
179         /* CLK */
180         at91_set_B_periph(AT91_PIN_PA2, 0);
181
182         /* CMD */
183         at91_set_B_periph(AT91_PIN_PA1, 1);
184
185         /* DAT0, maybe DAT1..DAT3 */
186         at91_set_B_periph(AT91_PIN_PA0, 1);
187         if (data->wire4) {
188                 at91_set_B_periph(AT91_PIN_PA4, 1);
189                 at91_set_B_periph(AT91_PIN_PA5, 1);
190                 at91_set_B_periph(AT91_PIN_PA6, 1);
191         }
192
193         mmc_data = *data;
194         platform_device_register(&at91sam9261_mmc_device);
195 }
196 #else
197 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
198 #endif
199
200
201 /* --------------------------------------------------------------------
202  *  NAND / SmartMedia
203  * -------------------------------------------------------------------- */
204
205 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
206 static struct at91_nand_data nand_data;
207
208 #define NAND_BASE       AT91_CHIPSELECT_3
209
210 static struct resource nand_resources[] = {
211         {
212                 .start  = NAND_BASE,
213                 .end    = NAND_BASE + SZ_256M - 1,
214                 .flags  = IORESOURCE_MEM,
215         }
216 };
217
218 static struct platform_device at91_nand_device = {
219         .name           = "at91_nand",
220         .id             = -1,
221         .dev            = {
222                                 .platform_data  = &nand_data,
223         },
224         .resource       = nand_resources,
225         .num_resources  = ARRAY_SIZE(nand_resources),
226 };
227
228 void __init at91_add_device_nand(struct at91_nand_data *data)
229 {
230         unsigned long csa, mode;
231
232         if (!data)
233                 return;
234
235         csa = at91_sys_read(AT91_MATRIX_EBICSA);
236         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
237
238         /* set the bus interface characteristics */
239         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
240                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
241
242         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
243                         | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
244
245         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
246
247         if (data->bus_width_16)
248                 mode = AT91_SMC_DBW_16;
249         else
250                 mode = AT91_SMC_DBW_8;
251         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
252
253         /* enable pin */
254         if (data->enable_pin)
255                 at91_set_gpio_output(data->enable_pin, 1);
256
257         /* ready/busy pin */
258         if (data->rdy_pin)
259                 at91_set_gpio_input(data->rdy_pin, 1);
260
261         /* card detect pin */
262         if (data->det_pin)
263                 at91_set_gpio_input(data->det_pin, 1);
264
265         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
266         at91_set_A_periph(AT91_PIN_PC1, 0);             /* NANDWE */
267
268         nand_data = *data;
269         platform_device_register(&at91_nand_device);
270 }
271
272 #else
273 void __init at91_add_device_nand(struct at91_nand_data *data) {}
274 #endif
275
276
277 /* --------------------------------------------------------------------
278  *  TWI (i2c)
279  * -------------------------------------------------------------------- */
280
281 /*
282  * Prefer the GPIO code since the TWI controller isn't robust
283  * (gets overruns and underruns under load) and can only issue
284  * repeated STARTs in one scenario (the driver doesn't yet handle them).
285  */
286 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
287
288 static struct i2c_gpio_platform_data pdata = {
289         .sda_pin                = AT91_PIN_PA7,
290         .sda_is_open_drain      = 1,
291         .scl_pin                = AT91_PIN_PA8,
292         .scl_is_open_drain      = 1,
293         .udelay                 = 2,            /* ~100 kHz */
294 };
295
296 static struct platform_device at91sam9261_twi_device = {
297         .name                   = "i2c-gpio",
298         .id                     = -1,
299         .dev.platform_data      = &pdata,
300 };
301
302 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
303 {
304         at91_set_GPIO_periph(AT91_PIN_PA7, 1);          /* TWD (SDA) */
305         at91_set_multi_drive(AT91_PIN_PA7, 1);
306
307         at91_set_GPIO_periph(AT91_PIN_PA8, 1);          /* TWCK (SCL) */
308         at91_set_multi_drive(AT91_PIN_PA8, 1);
309
310         i2c_register_board_info(0, devices, nr_devices);
311         platform_device_register(&at91sam9261_twi_device);
312 }
313
314 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
315
316 static struct resource twi_resources[] = {
317         [0] = {
318                 .start  = AT91SAM9261_BASE_TWI,
319                 .end    = AT91SAM9261_BASE_TWI + SZ_16K - 1,
320                 .flags  = IORESOURCE_MEM,
321         },
322         [1] = {
323                 .start  = AT91SAM9261_ID_TWI,
324                 .end    = AT91SAM9261_ID_TWI,
325                 .flags  = IORESOURCE_IRQ,
326         },
327 };
328
329 static struct platform_device at91sam9261_twi_device = {
330         .name           = "at91_i2c",
331         .id             = -1,
332         .resource       = twi_resources,
333         .num_resources  = ARRAY_SIZE(twi_resources),
334 };
335
336 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
337 {
338         /* pins used for TWI interface */
339         at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
340         at91_set_multi_drive(AT91_PIN_PA7, 1);
341
342         at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
343         at91_set_multi_drive(AT91_PIN_PA8, 1);
344
345         i2c_register_board_info(0, devices, nr_devices);
346         platform_device_register(&at91sam9261_twi_device);
347 }
348 #else
349 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
350 #endif
351
352
353 /* --------------------------------------------------------------------
354  *  SPI
355  * -------------------------------------------------------------------- */
356
357 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
358 static u64 spi_dmamask = DMA_BIT_MASK(32);
359
360 static struct resource spi0_resources[] = {
361         [0] = {
362                 .start  = AT91SAM9261_BASE_SPI0,
363                 .end    = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
364                 .flags  = IORESOURCE_MEM,
365         },
366         [1] = {
367                 .start  = AT91SAM9261_ID_SPI0,
368                 .end    = AT91SAM9261_ID_SPI0,
369                 .flags  = IORESOURCE_IRQ,
370         },
371 };
372
373 static struct platform_device at91sam9261_spi0_device = {
374         .name           = "atmel_spi",
375         .id             = 0,
376         .dev            = {
377                                 .dma_mask               = &spi_dmamask,
378                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
379         },
380         .resource       = spi0_resources,
381         .num_resources  = ARRAY_SIZE(spi0_resources),
382 };
383
384 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
385
386 static struct resource spi1_resources[] = {
387         [0] = {
388                 .start  = AT91SAM9261_BASE_SPI1,
389                 .end    = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
390                 .flags  = IORESOURCE_MEM,
391         },
392         [1] = {
393                 .start  = AT91SAM9261_ID_SPI1,
394                 .end    = AT91SAM9261_ID_SPI1,
395                 .flags  = IORESOURCE_IRQ,
396         },
397 };
398
399 static struct platform_device at91sam9261_spi1_device = {
400         .name           = "atmel_spi",
401         .id             = 1,
402         .dev            = {
403                                 .dma_mask               = &spi_dmamask,
404                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
405         },
406         .resource       = spi1_resources,
407         .num_resources  = ARRAY_SIZE(spi1_resources),
408 };
409
410 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
411
412 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
413 {
414         int i;
415         unsigned long cs_pin;
416         short enable_spi0 = 0;
417         short enable_spi1 = 0;
418
419         /* Choose SPI chip-selects */
420         for (i = 0; i < nr_devices; i++) {
421                 if (devices[i].controller_data)
422                         cs_pin = (unsigned long) devices[i].controller_data;
423                 else if (devices[i].bus_num == 0)
424                         cs_pin = spi0_standard_cs[devices[i].chip_select];
425                 else
426                         cs_pin = spi1_standard_cs[devices[i].chip_select];
427
428                 if (devices[i].bus_num == 0)
429                         enable_spi0 = 1;
430                 else
431                         enable_spi1 = 1;
432
433                 /* enable chip-select pin */
434                 at91_set_gpio_output(cs_pin, 1);
435
436                 /* pass chip-select pin to driver */
437                 devices[i].controller_data = (void *) cs_pin;
438         }
439
440         spi_register_board_info(devices, nr_devices);
441
442         /* Configure SPI bus(es) */
443         if (enable_spi0) {
444                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
445                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
446                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
447
448                 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
449                 platform_device_register(&at91sam9261_spi0_device);
450         }
451         if (enable_spi1) {
452                 at91_set_A_periph(AT91_PIN_PB30, 0);    /* SPI1_MISO */
453                 at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
454                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
455
456                 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
457                 platform_device_register(&at91sam9261_spi1_device);
458         }
459 }
460 #else
461 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
462 #endif
463
464
465 /* --------------------------------------------------------------------
466  *  LCD Controller
467  * -------------------------------------------------------------------- */
468
469 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
470 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
471 static struct atmel_lcdfb_info lcdc_data;
472
473 static struct resource lcdc_resources[] = {
474         [0] = {
475                 .start  = AT91SAM9261_LCDC_BASE,
476                 .end    = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
477                 .flags  = IORESOURCE_MEM,
478         },
479         [1] = {
480                 .start  = AT91SAM9261_ID_LCDC,
481                 .end    = AT91SAM9261_ID_LCDC,
482                 .flags  = IORESOURCE_IRQ,
483         },
484 #if defined(CONFIG_FB_INTSRAM)
485         [2] = {
486                 .start  = AT91SAM9261_SRAM_BASE,
487                 .end    = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
488                 .flags  = IORESOURCE_MEM,
489         },
490 #endif
491 };
492
493 static struct platform_device at91_lcdc_device = {
494         .name           = "atmel_lcdfb",
495         .id             = 0,
496         .dev            = {
497                                 .dma_mask               = &lcdc_dmamask,
498                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
499                                 .platform_data          = &lcdc_data,
500         },
501         .resource       = lcdc_resources,
502         .num_resources  = ARRAY_SIZE(lcdc_resources),
503 };
504
505 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
506 {
507         if (!data) {
508                 return;
509         }
510
511 #if defined(CONFIG_FB_ATMEL_STN)
512         at91_set_A_periph(AT91_PIN_PB0, 0);     /* LCDVSYNC */
513         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
514         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
515         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
516         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
517         at91_set_A_periph(AT91_PIN_PB5, 0);     /* LCDD0 */
518         at91_set_A_periph(AT91_PIN_PB6, 0);     /* LCDD1 */
519         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
520         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
521 #else
522         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
523         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
524         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
525         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
526         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
527         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
528         at91_set_A_periph(AT91_PIN_PB9, 0);     /* LCDD4 */
529         at91_set_A_periph(AT91_PIN_PB10, 0);    /* LCDD5 */
530         at91_set_A_periph(AT91_PIN_PB11, 0);    /* LCDD6 */
531         at91_set_A_periph(AT91_PIN_PB12, 0);    /* LCDD7 */
532         at91_set_A_periph(AT91_PIN_PB15, 0);    /* LCDD10 */
533         at91_set_A_periph(AT91_PIN_PB16, 0);    /* LCDD11 */
534         at91_set_A_periph(AT91_PIN_PB17, 0);    /* LCDD12 */
535         at91_set_A_periph(AT91_PIN_PB18, 0);    /* LCDD13 */
536         at91_set_A_periph(AT91_PIN_PB19, 0);    /* LCDD14 */
537         at91_set_A_periph(AT91_PIN_PB20, 0);    /* LCDD15 */
538         at91_set_B_periph(AT91_PIN_PB23, 0);    /* LCDD18 */
539         at91_set_B_periph(AT91_PIN_PB24, 0);    /* LCDD19 */
540         at91_set_B_periph(AT91_PIN_PB25, 0);    /* LCDD20 */
541         at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
542         at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
543         at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
544 #endif
545
546         lcdc_data = *data;
547         platform_device_register(&at91_lcdc_device);
548 }
549 #else
550 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
551 #endif
552
553
554 /* --------------------------------------------------------------------
555  *  RTT
556  * -------------------------------------------------------------------- */
557
558 static struct resource rtt_resources[] = {
559         {
560                 .start  = AT91_BASE_SYS + AT91_RTT,
561                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
562                 .flags  = IORESOURCE_MEM,
563         }
564 };
565
566 static struct platform_device at91sam9261_rtt_device = {
567         .name           = "at91_rtt",
568         .id             = -1,
569         .resource       = rtt_resources,
570         .num_resources  = ARRAY_SIZE(rtt_resources),
571 };
572
573 static void __init at91_add_device_rtt(void)
574 {
575         platform_device_register(&at91sam9261_rtt_device);
576 }
577
578
579 /* --------------------------------------------------------------------
580  *  Watchdog
581  * -------------------------------------------------------------------- */
582
583 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
584 static struct platform_device at91sam9261_wdt_device = {
585         .name           = "at91_wdt",
586         .id             = -1,
587         .num_resources  = 0,
588 };
589
590 static void __init at91_add_device_watchdog(void)
591 {
592         platform_device_register(&at91sam9261_wdt_device);
593 }
594 #else
595 static void __init at91_add_device_watchdog(void) {}
596 #endif
597
598
599 /* --------------------------------------------------------------------
600  *  LEDs
601  * -------------------------------------------------------------------- */
602
603 #if defined(CONFIG_LEDS)
604 u8 at91_leds_cpu;
605 u8 at91_leds_timer;
606
607 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
608 {
609         /* Enable GPIO to access the LEDs */
610         at91_set_gpio_output(cpu_led, 1);
611         at91_set_gpio_output(timer_led, 1);
612
613         at91_leds_cpu   = cpu_led;
614         at91_leds_timer = timer_led;
615 }
616 #else
617 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
618 #endif
619
620
621 /* --------------------------------------------------------------------
622  *  UART
623  * -------------------------------------------------------------------- */
624
625 #if defined(CONFIG_SERIAL_ATMEL)
626 static struct resource dbgu_resources[] = {
627         [0] = {
628                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
629                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
630                 .flags  = IORESOURCE_MEM,
631         },
632         [1] = {
633                 .start  = AT91_ID_SYS,
634                 .end    = AT91_ID_SYS,
635                 .flags  = IORESOURCE_IRQ,
636         },
637 };
638
639 static struct atmel_uart_data dbgu_data = {
640         .use_dma_tx     = 0,
641         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
642         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
643 };
644
645 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
646
647 static struct platform_device at91sam9261_dbgu_device = {
648         .name           = "atmel_usart",
649         .id             = 0,
650         .dev            = {
651                                 .dma_mask               = &dbgu_dmamask,
652                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
653                                 .platform_data          = &dbgu_data,
654         },
655         .resource       = dbgu_resources,
656         .num_resources  = ARRAY_SIZE(dbgu_resources),
657 };
658
659 static inline void configure_dbgu_pins(void)
660 {
661         at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
662         at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
663 }
664
665 static struct resource uart0_resources[] = {
666         [0] = {
667                 .start  = AT91SAM9261_BASE_US0,
668                 .end    = AT91SAM9261_BASE_US0 + SZ_16K - 1,
669                 .flags  = IORESOURCE_MEM,
670         },
671         [1] = {
672                 .start  = AT91SAM9261_ID_US0,
673                 .end    = AT91SAM9261_ID_US0,
674                 .flags  = IORESOURCE_IRQ,
675         },
676 };
677
678 static struct atmel_uart_data uart0_data = {
679         .use_dma_tx     = 1,
680         .use_dma_rx     = 1,
681 };
682
683 static u64 uart0_dmamask = DMA_BIT_MASK(32);
684
685 static struct platform_device at91sam9261_uart0_device = {
686         .name           = "atmel_usart",
687         .id             = 1,
688         .dev            = {
689                                 .dma_mask               = &uart0_dmamask,
690                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
691                                 .platform_data          = &uart0_data,
692         },
693         .resource       = uart0_resources,
694         .num_resources  = ARRAY_SIZE(uart0_resources),
695 };
696
697 static inline void configure_usart0_pins(void)
698 {
699         at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
700         at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
701         at91_set_A_periph(AT91_PIN_PC10, 0);            /* RTS0 */
702         at91_set_A_periph(AT91_PIN_PC11, 0);            /* CTS0 */
703 }
704
705 static struct resource uart1_resources[] = {
706         [0] = {
707                 .start  = AT91SAM9261_BASE_US1,
708                 .end    = AT91SAM9261_BASE_US1 + SZ_16K - 1,
709                 .flags  = IORESOURCE_MEM,
710         },
711         [1] = {
712                 .start  = AT91SAM9261_ID_US1,
713                 .end    = AT91SAM9261_ID_US1,
714                 .flags  = IORESOURCE_IRQ,
715         },
716 };
717
718 static struct atmel_uart_data uart1_data = {
719         .use_dma_tx     = 1,
720         .use_dma_rx     = 1,
721 };
722
723 static u64 uart1_dmamask = DMA_BIT_MASK(32);
724
725 static struct platform_device at91sam9261_uart1_device = {
726         .name           = "atmel_usart",
727         .id             = 2,
728         .dev            = {
729                                 .dma_mask               = &uart1_dmamask,
730                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
731                                 .platform_data          = &uart1_data,
732         },
733         .resource       = uart1_resources,
734         .num_resources  = ARRAY_SIZE(uart1_resources),
735 };
736
737 static inline void configure_usart1_pins(void)
738 {
739         at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
740         at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
741 }
742
743 static struct resource uart2_resources[] = {
744         [0] = {
745                 .start  = AT91SAM9261_BASE_US2,
746                 .end    = AT91SAM9261_BASE_US2 + SZ_16K - 1,
747                 .flags  = IORESOURCE_MEM,
748         },
749         [1] = {
750                 .start  = AT91SAM9261_ID_US2,
751                 .end    = AT91SAM9261_ID_US2,
752                 .flags  = IORESOURCE_IRQ,
753         },
754 };
755
756 static struct atmel_uart_data uart2_data = {
757         .use_dma_tx     = 1,
758         .use_dma_rx     = 1,
759 };
760
761 static u64 uart2_dmamask = DMA_BIT_MASK(32);
762
763 static struct platform_device at91sam9261_uart2_device = {
764         .name           = "atmel_usart",
765         .id             = 3,
766         .dev            = {
767                                 .dma_mask               = &uart2_dmamask,
768                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
769                                 .platform_data          = &uart2_data,
770         },
771         .resource       = uart2_resources,
772         .num_resources  = ARRAY_SIZE(uart2_resources),
773 };
774
775 static inline void configure_usart2_pins(void)
776 {
777         at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
778         at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
779 }
780
781 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
782 struct platform_device *atmel_default_console_device;   /* the serial console device */
783
784 void __init at91_init_serial(struct at91_uart_config *config)
785 {
786         int i;
787
788         /* Fill in list of supported UARTs */
789         for (i = 0; i < config->nr_tty; i++) {
790                 switch (config->tty_map[i]) {
791                         case 0:
792                                 configure_usart0_pins();
793                                 at91_uarts[i] = &at91sam9261_uart0_device;
794                                 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
795                                 break;
796                         case 1:
797                                 configure_usart1_pins();
798                                 at91_uarts[i] = &at91sam9261_uart1_device;
799                                 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
800                                 break;
801                         case 2:
802                                 configure_usart2_pins();
803                                 at91_uarts[i] = &at91sam9261_uart2_device;
804                                 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
805                                 break;
806                         case 3:
807                                 configure_dbgu_pins();
808                                 at91_uarts[i] = &at91sam9261_dbgu_device;
809                                 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
810                                 break;
811                         default:
812                                 continue;
813                 }
814                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
815         }
816
817         /* Set serial console device */
818         if (config->console_tty < ATMEL_MAX_UART)
819                 atmel_default_console_device = at91_uarts[config->console_tty];
820         if (!atmel_default_console_device)
821                 printk(KERN_INFO "AT91: No default serial console defined.\n");
822 }
823
824 void __init at91_add_device_serial(void)
825 {
826         int i;
827
828         for (i = 0; i < ATMEL_MAX_UART; i++) {
829                 if (at91_uarts[i])
830                         platform_device_register(at91_uarts[i]);
831         }
832 }
833 #else
834 void __init at91_init_serial(struct at91_uart_config *config) {}
835 void __init at91_add_device_serial(void) {}
836 #endif
837
838
839 /* -------------------------------------------------------------------- */
840
841 /*
842  * These devices are always present and don't need any board-specific
843  * setup.
844  */
845 static int __init at91_add_standard_devices(void)
846 {
847         at91_add_device_rtt();
848         at91_add_device_watchdog();
849         return 0;
850 }
851
852 arch_initcall(at91_add_standard_devices);